Many technologies employ phase locked loops (PLLs). For example, in scanning probe microscopy, scientists use scanning probe microscopes (SPMs) to reveal data about various properties of materials, like gold or silicon, at very fine resolution down to molecules and atoms of the materials. SPMs are a family of ultra-high magnification instruments that include Scanning Tunneling Microscopes (STMs), Atomic Force Microscopes (AFMs), Near Field Scanning Optical Microscopes (NSOMs), among others. Non-contact SPMs include apertureless NSOMs, and Kelvin Probe Force Microscopes (KPFMs) which are non-contact variants of AFMs.
In one example, an SPM may include a flat support upon which a material specimen is placed, and a cantilever having a free end with a small sharp probe suspended above the specimen probe with a tip so fine it is about the size of a single atom. The SPM also may include a cantilever actuator to oscillate the cantilever in relation to the specimen, and one or more detectors to measure the oscillation of the cantilever. The SPM further may include a digital PLL to receive a cantilever oscillation signal from the oscillation detector(s) and an output reference oscillation signal from a reference oscillator. The digital PLL then determines a phase difference between the oscillation signals to generate a phase difference signal. The digital PLL next filters the phase difference signal, amplifies or attenuates the phase difference signal, and feeds the phase difference signal back as an input to the reference oscillator. The output signal of the reference oscillator is also coupled to a phase shifter to optimize resonance of the cantilever and is mixed with a cantilever excitation signal that is fed downstream to the electromechanical oscillator. As a result, the PLL responds to the oscillation input signals by automatically raising or lowering the frequency of the cantilever oscillator until the cantilever oscillates in fixed relation to the reference oscillator signal.
In non-contact modes of SPM, a cantilever may be oscillated at or close to its fundamental resonance frequency, and the amplitude, phase, and frequency of the oscillating cantilever may vary as a function of probe-sample interaction forces. Such variation in cantilever oscillation with respect to an external reference oscillation provides information about the characteristics of the specimen and is used to discriminate between different types of materials on the surface of the specimen.
In a particular example, digital PLL circuits are now used for non-contact AFM and offer superior stability and accuracy in frequency detection over analog PLL's. In this example, a reference oscillator of the PLL generates the reference signal, which is then mixed with a PLL input signal. Separately, an excitation signal is used to excite the cantilever. For example, the reference oscillator may be a numerically controlled oscillator (NCO) that has a normal output and a quadrature output. These outputs can then be summed to generate a phase shift. But the disadvantage of this configuration is that it is not possible to run cantilever excitation and PLL detection at harmonic frequencies of each other. They must be the same.
In another example, involving KPFM or apertureless NSOM applications, additional lock-in amplifiers are used to analyze the same signals in parallel to the PLL. These applications involve detection of integer or rational multiples of the PLL reference frequency as well as fixed offsets from a fluctuating base cantilever frequency. For instance, two lock-In amplifiers can be run in parallel to a PLL detector. But such a configuration is considerably costly for each additional lock-in, and runs on an external reference. Modern digital lock-ins generate the reference using a PLL with very low time constant and, thus, cannot handle constant changes in frequency very well. In any event, it is not possible with such a configuration to provide a fixed offset from the fluctuating PLL reference frequency or a harmonic thereof.
Frequency generation in digital PLL's is based on the Direct Digital Synthesis (DDS) principle, and hybrid approaches include using analog mixers with digital reference frequency generators. Synchronization between DDS phase accumulators can be achieved by sending synchronization pulses on zero crossings from a master phase accumulator where a synched phase accumulator is held until the master signal crosses zero. In one implementation, two DDS chips are run in parallel on the same clock and on the same data bus. But this design does not permit setting up the two DDS chips with different frequencies as is required for detecting or exciting relatively high harmonics.
Finally, with analog PLL circuits, although it is possible to create integer and fractional multiples of a base frequency with frequency dividers between a VCO and a mixer, it is complicated to build a variable frequency ratio frequency multiplier this way and it is impossible to have the circuit output pure sine waves this way.